This paper presents design and implementation of a 100-MHz Analog-to-Information Converter (AIC) based on Random Demodulator (RD); for this purpose, we used off-the-shelf components to implement the analog front-end and a SoC-FPGA chip to implement the digital hardware/software subsystem. Analog front-end is composed of one mixer and one low-pass filter, which were implemented by using a Gilbert Cell and a passive RC circuit, respectively. Hardware/software sub-system was implemented on the Field Programmable Array (FPGA) and Hard Processor System (HPS) sides of the SoC-FPGA chip, where FPGA side was used to implement the hardware that manages RD and HPS side was used to implement spectrum recovery algorithms. Finally, verification results showed that designed AIC can recover sparse signals of 100 MHz bandwidth, where a sub-Nyquist rate of 4 MHz is used along with two Compressive Sensing (CS) recovery algorithms.