A fully-synthesized true-random number generator (TRNG) using cellular automata as post-processing stage is implemented in an FGPA and in a 130nm CMOS technology. A 3-edge ring oscillator provides the entropy source based on accumulative jitter. The post-processing stage uses a programmable array of cellular automatas and its performance is evaluated for all possible rules that can be constructed. 1.4Mbits are captured using the FPGA implementation and the randomness of data is tested applying NIST tests. One-dimensional cellular automata in a TRNG is reported reducing bias of output data. In addition, the fully-synthesized generator is completely verified for fabrication in 130nm CMOS technology and occupies a final area of 0.0098 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> where the post-processing stage uses only 0.0023 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .