Due to its scalability and flexibility, Network-on-Chip (NoC) is a growing and promising communication paradigm for Multiprocessor System-on-Chip (MPSoC) design.As the manufacturing process scales down to the deep submicron domain and the complexity of the system increases, fault-tolerant design strategies are gaining increased relevance.This paper exhibits the use of a Population-Based Incremental Learning (PBIL) algorithm aimed at finding the best mapping solutions at design time, as well as to finding the optimal remapping solution, in presence of single-node failures on the NoC.The optimization objectives in both cases are the application completion time and the network's peak bandwidth.A deterministic XY routing algorithm was used in order to simulate the traffic conditions in the network which has a 2D mesh topology.Obtained results are promising.The proposed algorithm exhibits a better performance, when compared with other reported approaches, as the problem size increases.