One of the key requirements in systems for symbolic computation is the fast and efficient execution of set operations, such as addition, removal, or test for membership of an element in a given set S. Content-addressable memory (CAM) offers the potential for massive fine-grained parallelism in the implementation of these operations, yielding a potential speedup of O(l Sl). The authors describes an ASIC design of a 32*32 CMOS static CAM for use in an associative set processor.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
