This article shows a procedure for IIR digital filters implementation using MatLab System Generator for testing and verification of results. In this particular case, the IIR filters are expressed in a State-Space representation, and the coefficients of the filter matrix are given in a fixed point format. This procedure aims to make implementations on devices with finite accuracy. Thus, the implementation is done using a state equation model with balanced realizations because of its numerical properties. The balanced forms exhibit low sensitivity to parameter variations, and avoid, to some extent, the numeric overflow. A user interface is designed in order to enter the filter transfer function or the filter state equation, and it automatically generates the VHDL language in a standard format compatible with the format used in a Black Box object of the System Generator. In this work, a 4th order low-pass Butterworth filter was implemented as an example of the methodology in a Xilinx FPGA device. The practical results obtained are shown.