In real time compression algorithms, the mathematical used in the model must be easily modeled in hardware language. Most of the developments have been probed on Field Programmable Gate Arrays (FPGA) because it is fast and reliable. In this work, we present the architecture for biomédical compression based on Discrete Wavelet Transform (DWT) and run length encoding: bank of register, coefficients block, control unit, multiplier/adder, thresholding and encoding. The DWT is performed in one level with sym4, the coefficients are threshold by hard rule and encoding is by zero run length. The hardware resources correspond to 7% of the available in the Spartan3 of Xilinx; the simulation of each module was on ModelSim.