This article presents a different and simple methodology used in design and implementation of digital filters with finite impulse response (FIR), on an architecture reconfigurable as FPGA XC3S200. On this development was used CAD tools such as “FIR Toolbox” and “ISE” from Xilinx, achieving results in record time, optimizing the hardware resources used, and a good performance in frequency. These characteristics are desirable on development of systems oriented to digital signal processing.